The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2017

Filed:

Oct. 31, 2012
Applicants:

Alexander Dohn, Memmelsdorf, DE;

Roland Leneis, Marktredwitz, DE;

Klaus Herrmann, Thiersheim, DE;

Dietmar Jähnig, Bindlach, DE;

Inventors:

Alexander Dohn, Memmelsdorf, DE;

Roland Leneis, Marktredwitz, DE;

Klaus Herrmann, Thiersheim, DE;

Dietmar Jähnig, Bindlach, DE;

Assignee:

CeramTec GmbH, Plochingen, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01K 3/10 (2006.01); H05K 3/12 (2006.01); H05K 3/24 (2006.01); H05K 3/40 (2006.01); H05K 1/11 (2006.01); H05K 1/02 (2006.01); H05K 1/03 (2006.01); H05K 1/09 (2006.01);
U.S. Cl.
CPC ...
H05K 3/1216 (2013.01); H05K 1/115 (2013.01); H05K 3/245 (2013.01); H05K 3/4038 (2013.01); H05K 3/4061 (2013.01); H05K 1/0263 (2013.01); H05K 1/0306 (2013.01); H05K 1/092 (2013.01); H05K 3/1291 (2013.01); H05K 3/246 (2013.01); H05K 2201/10106 (2013.01); H05K 2203/086 (2013.01); H05K 2203/1476 (2013.01); Y10T 29/49165 (2015.01);
Abstract

Process for producing a ceramic circuit board with electrical conductor traces and contacting points on a side and with a through-hole contact by successively a) producing an AlN substrate and drilling holes at the locations for the vias, b) filling the holes with an adhesive paste containing copper, tungsten and/or molybdenum or alloys thereof, and c) single-pass overprinting with a second adhesive paste using a first screen-printing operation on a side of the ceramic substrate with the layout of the conductor traces and contact points, d) optionally, fully or partially repeating overprinting with the second adhesive paste, e) stoving the printed ceramic substrate in an oven with Nwhile controlling oxygen at 0-50 ppm O, f) overprinting using a second screen-printing process with a low-glass cover paste over the second adhesive paste, and g) stoving the printed ceramic substrate with Nwhile keeping the oxygen content at 0-50 ppm O.


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