The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2017

Filed:

Sep. 19, 2014
Applicant:

The Regents of the University of Michigan, Ann Arbor, MI (US);

Inventors:

Yen-po Chen, Ann Arbor, MI (US);

Yoonmyung Lee, Ann Arbor, MI (US);

Jae-Yoon Sim, Pohang, KR;

Massimo Alioto, Singapore, SG;

Dennis Sylvester, Ann Arbor, MI (US);

David Blaauw, Ann Arbor, MI (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H02H 1/04 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); H02H 1/04 (2013.01); H02H 9/04 (2013.01);
Abstract

An electrostatic discharge clamp circuit is provided for low power applications. The clamp circuit includes: a detection circuit, a bias circuit and a shunting circuit having at least one shunt transistor. The detection circuit is configured to detect an occurrence of an electrostatic charge on a power supply node and trigger discharge of the electrostatic charge through the shunting circuit. The bias circuit is coupled between the detection circuit and the shunting circuit and applies a bias voltage to the gate terminal of the shunt transistor. During an electrostatic discharge event, the bias circuit is configured to generate a bias voltage that is substantially equal to the supply voltage; whereas, during the absence of an electrostatic discharge event, the bias circuit is configured to generate a bias voltage that is substantially half of the supply voltage.


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