The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9716164 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 25, 2017

Filed:

Sep. 03, 2013
Applicant:

Soitec, Bernin, FR;

Inventor:

Mariam Sadaka, Austin, TX (US);

Assignee:

SOITEC, Bernin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/02 (2006.01); H01L 29/205 (2006.01); H01L 21/683 (2006.01); H01L 29/20 (2006.01); H01L 23/36 (2006.01); H01L 21/762 (2006.01); H01L 29/201 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 21/0254 (2013.01); H01L 21/02425 (2013.01); H01L 21/6835 (2013.01); H01L 21/76256 (2013.01); H01L 23/36 (2013.01); H01L 29/201 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01); H01L 29/7781 (2013.01); H01L 29/7788 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 29/4175 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/293 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/29184 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83851 (2013.01); H01L 2224/83895 (2013.01); H01L 2924/1461 (2013.01);
Abstract

Methods of forming semiconductor devices include epitaxially growing a III-V base layer over a first substrate in a first deposition chamber. The III-V base layer is transferred from the first substrate to a second substrate, and at least one III-V device layer is epitaxially grown on the III-V base layer in a second deposition chamber separate from the first deposition chamber while the III-V base layer is disposed on the second substrate. The first substrate exhibits an average coefficient of thermal expansion (CTE) closer to an average CTE exhibited by the III-V base layer than an average CTE exhibited by the second substrate. Semiconductor devices may be fabricated using such methods.


Find Patent Forward Citations

Sadaka, Mariam. (2017). Methods of forming iii-v semiconductor structures using multiple substrates, and semiconductor devices fabricated using such methods (U.S. Patent No. 9716164). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9716164

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