The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2017

Filed:

Jun. 18, 2015
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;

Inventors:

Changjiang Yan, Beijing, CN;

Kai Lu, Beijing, CN;

Jian Guo, Beijing, CN;

Zhenyu Xie, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 21/311 (2006.01); H01L 29/66 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1259 (2013.01); H01L 21/31116 (2013.01); H01L 21/76804 (2013.01); H01L 29/66765 (2013.01);
Abstract

The invention relates to the field of display technologies, and discloses a method for producing a via, a method for producing an array substrate, an array substrate and a display device to prevent a chamfer from being formed in producing the via, to promote the product quality and improve the display effect of the display device. The method for producing a via comprises: employing a first etching process to partially etch a top film layer in an area that needs to form a via above an electrode, wherein the vertical etching amount achieved by employing the first etching process is less than the thickness of the top film layer; and employing a second etching process for which the vertical etching rate is larger than the lateral etching rate to etch the remaining part in the area that needs to form a via, until the electrode is exposed.


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