The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2017

Filed:

Sep. 04, 2014
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventor:

Toru Sano, Kawasaki Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/06 (2006.01); G06F 12/122 (2016.01); G06F 12/0871 (2016.01); G06F 12/0864 (2016.01); G06F 12/123 (2016.01);
U.S. Cl.
CPC ...
G06F 12/122 (2013.01); G06F 12/0864 (2013.01); G06F 12/0871 (2013.01); G06F 12/123 (2013.01); G06F 2212/604 (2013.01); G06F 2212/69 (2013.01);
Abstract

According to an embodiment, a cache memory control circuit includes: a hit determination section; a refill processing section; a search section configured to determine a refill candidate way by searching for the way candidate for a refill process from a plurality of ways based on an LRU algorithm when the hit determination section detects a cache miss; a binary tree information section configured to store binary tree information for the LRU algorithm; a conflict detection section; and a control section. The control section updates the binary tree information in the binary tree information section by using way information of the way where the refill process is being executed when the conflict detection section determines that the way where the refill process is being executed and the refill candidate way match each other.


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