The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2017

Filed:

Jan. 18, 2012
Applicants:

Karim M. Abdalla, Menlo Park, CA (US);

Lacky V. Shah, Los Altos Hills, CA (US);

Jerome F. Duluk, Jr., Palo Alto, CA (US);

Timothy John Purcell, Provo, UT (US);

Tanmoy Mandal, San Jose, CA (US);

Gentaro Hirota, Sunnyvale, CA (US);

Inventors:

Karim M. Abdalla, Menlo Park, CA (US);

Lacky V. Shah, Los Altos Hills, CA (US);

Jerome F. Duluk, Jr., Palo Alto, CA (US);

Timothy John Purcell, Provo, UT (US);

Tanmoy Mandal, San Jose, CA (US);

Gentaro Hirota, Sunnyvale, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 13/00 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/505 (2013.01); G06F 2209/503 (2013.01);
Abstract

One embodiment of the present invention sets forth a technique for selecting a first processor included in a plurality of processors to receive work related to a compute task. The technique involves analyzing state data of each processor in the plurality of processors to identify one or more processors that have already been assigned one compute task and are eligible to receive work related to the one compute task, receiving, from each of the one or more processors identified as eligible, an availability value that indicates the capacity of the processor to receive new work, selecting a first processor to receive work related to the one compute task based on the availability values received from the one or more processors, and issuing, to the first processor via a cooperative thread array (CTA), the work related to the one compute task.


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