The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2017

Filed:

Oct. 07, 2015
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Steven B. Shauck, Crofton, MD (US);

Alexander Braun, Baltimore, MD (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H03K 19/195 (2006.01); H03K 19/00 (2006.01); G06N 99/00 (2010.01);
U.S. Cl.
CPC ...
H03K 19/195 (2013.01); G06N 99/002 (2013.01); H03K 19/0008 (2013.01); H03K 19/17708 (2013.01);
Abstract

A device including an array of superconducting logic cells, where each of the superconducting logic cells is configured to receive at least one input and provide at least one output, is provided. Each of the superconducting logic cells includes at least one Josephson junction, whose state changes based on at least a biasing condition caused by a phase of a first clock or a phase of a second clock. The array of the superconducting logic cells is configured to perform at least one operation based at least on a connection arrangement of the array of the superconducting logic cells.


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