The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2017

Filed:

Sep. 26, 2014
Applicants:

Epistar Corporation, Hsinchu, TW;

Huga Optotech Inc., Taichung, TW;

Inventors:

Heng-Kuang Lin, Taichung, TW;

Ya-Yu Yang, Taichung, TW;

Assignee:

EPISTAR CORPORATION, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/12 (2010.01); H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 33/32 (2010.01); H01L 21/265 (2006.01); H01L 29/812 (2006.01);
U.S. Cl.
CPC ...
H01L 33/12 (2013.01); H01L 21/0254 (2013.01); H01L 21/02381 (2013.01); H01L 21/02458 (2013.01); H01L 21/02505 (2013.01); H01L 21/26506 (2013.01); H01L 29/2003 (2013.01); H01L 29/812 (2013.01); H01L 33/32 (2013.01);
Abstract

The present application discloses a semiconductor device comprising a crystalline substrate having a first region and a second region, a nuclei structure on the first region, a first crystalline buffer layer on the nuclei structure, a void between the second region and the first crystalline buffer layer, a second crystalline buffer layer on the first crystalline buffer layer, an intermediate layer located between the first crystalline buffer layer and the second crystalline buffer layer, and a semiconductor device layer on the second crystalline buffer layer.


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