The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2017

Filed:

Oct. 31, 2014
Applicant:

Avago Technologies General Ip (Singapore) Pte. Ltd, Singapore, SG;

Inventors:

Sophie Wilson, Lode Cambridge, GB;

John Redford, Cambridge, GB;

Geoffrey Barrett, Bristol, GB;

Tariq Kurd, Bishopton, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30098 (2013.01); G06F 9/3013 (2013.01); G06F 9/30043 (2013.01); G06F 9/30058 (2013.01); G06F 9/30065 (2013.01); G06F 9/30145 (2013.01); G06F 9/384 (2013.01); G06F 9/3826 (2013.01); G06F 9/3832 (2013.01); G06F 9/3834 (2013.01); G06F 9/3836 (2013.01); G06F 9/3842 (2013.01); G06F 9/3848 (2013.01); G06F 9/3857 (2013.01);
Abstract

A processor including a register file having a plurality of registers, and configured for out-of-order instruction execution, further includes a renamer unit that produces generation numbers that are associated with register file addresses to provide a renamed version of a register that is temporally offset from an existing version of that register rather than assigning a non-programmer-visible physical register as the renamed register. The processor includes a small reset DHL Gshare branch prediction unit coupled to an instruction cache and configured to provide speculative addresses to the instruction cache.


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