The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2017

Filed:

Aug. 22, 2016
Applicant:

Kabushiki Kaisha Audio-technica, Machida-shi, Tokyo, JP;

Inventors:

Hiroaki Furuya, Machida, JP;

Hiroshi Akino, Machida, JP;

Satoshi Yoshino, Machida, JP;

Assignee:

KABUSHIKI KAISHA AUDIO-TECHNICA, Machida-shi, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04R 1/08 (2006.01); H04R 3/00 (2006.01); H05B 33/08 (2006.01); H04R 19/04 (2006.01);
U.S. Cl.
CPC ...
H05B 33/0842 (2013.01); H04R 1/08 (2013.01); H04R 3/00 (2013.01); H04R 19/04 (2013.01);
Abstract

An audio output circuit of a condenser microphone includes a condenser microphone unit, first and second impedance conversion circuits that receive a positive phase output signal and a reverse phase output signal from the condenser microphone unit, first and second output circuits that output an audio signal from the condenser microphone unit in a balanced line to a balanced output terminals upon receipt of outputs of the first and second impedance conversion circuits. First and second impedance conversion circuits respectively use FETs as source follower circuits and supply first and second impedance conversion outputs generated across source resistors to the first and second output circuits. A voltage regulating device that generates a constant voltage is connected in series to the source resistors. With this configuration, an audio output circuit of a condenser microphone is provided, which solves a problem of operation instability caused by variation of Idss's of the FETs.


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