The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2017

Filed:

Jul. 27, 2016
Applicant:

Silicon Laboratories Inc., Austin, TX (US);

Inventors:

Timothy A. Monk, Hudson, NH (US);

Rajesh Thirugnanam, Nashua, NH (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 7/04 (2006.01); H03M 1/08 (2006.01); H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
H03M 1/08 (2013.01); H03M 1/66 (2013.01);
Abstract

A noise-shaping signed digital-to-analog converter is described. A method includes selectively enabling a first sequence of unit elements of a plurality of unit elements of a digital-to-analog converter to convert a signed digital code to a plurality of analog signals in response to a plurality of control signals. Individual control signals of the plurality of control signals and individual analog signals of the plurality of analog signals correspond to respective unit elements of the plurality of unit elements. The method includes generating the plurality of control signals based on a pointer, a magnitude of the signed digital code, and a sign of the signed digital code. The method may include combining the plurality of analog signals with an output of a phase/frequency detector and charge pump in a phase-locked loop. The signed digital code may be an error signal based on a predetermined divide ratio of the phase-locked loop.


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