The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2017
Filed:
Dec. 31, 2015
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Sudesh Chandra Srivastava, Bangalore, IN;
Vivek Singhal, Bangalore, IN;
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/35 (2006.01); H03K 3/3562 (2006.01); H01L 27/088 (2006.01); H01L 27/02 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H03K 3/3562 (2013.01); H01L 27/0207 (2013.01); H01L 27/088 (2013.01); H01L 29/1095 (2013.01);
Abstract
An integrated circuit device having a p-well plane, a plurality of substantially parallel n-well rows, and a logic cell. The p-well plane is comprised of p-type semiconductor material. Each n-well row comprises an n-type layer disposed on the surface of the p-well plane. The plurality of n-well rows includes a first n-well row and a second n-well row. The logic cell is arranged on the p-well plane and the footprint of the logic cell encompasses both the first and second n-well rows.