The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2017

Filed:

Nov. 14, 2013
Applicant:

Abb Technology Ag, Zurich, CH;

Inventors:

Xiaoming Feng, Cary, NC (US);

Will Briggs, Sugar Land, TX (US);

Mani Subramanian, Sugar Lane, TX (US);

Ernst Scholtz, Houston, TX (US);

Assignee:

ABB Research Ltd., Zurich, CH;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06Q 50/06 (2012.01); H02J 4/00 (2006.01); G06Q 10/06 (2012.01); H02J 3/00 (2006.01);
U.S. Cl.
CPC ...
H02J 4/00 (2013.01); G06Q 10/063 (2013.01); G06Q 50/06 (2013.01); H02J 2003/007 (2013.01);
Abstract

The teachings herein disclose an advantageous method and apparatus for performing Security Constrained Economic Dispatch (SCED) for a hybrid power system that includes one or more AC grids interconnected with one or more multi-terminal High Voltage DC (HVDC) grids. The teachings include optimizing a non-linear objective function, subject to a set of constraints that include AC and DC grid constraints, for determining the SCED solution using successive linear approximation. The linear programming model used in the linear approximations is advantageously augmented with a DC grid portion in a manner that accounts for the effects of the DC grid on the AC grid, but which does not require exposing proprietary DC grid modeling details, and which conforms the resultant SCED solution to all applicable AC and DC grid constraints, including AC grid line flow constraints, AC grid power balance constraints, DC grid line flow constraints, and DC grid power balance constraints.


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