The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2017

Filed:

Jul. 27, 2016
Applicant:

Mie Fujitsu Semiconductor Limited, Kuwana-shi, Mie, JP;

Inventor:

Satoshi Torii, Kuwana, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/28 (2006.01); G11C 16/24 (2006.01);
U.S. Cl.
CPC ...
G11C 16/28 (2013.01); G11C 16/0408 (2013.01); G11C 16/24 (2013.01);
Abstract

A semiconductor storage device including plural bit lines, plural select gate lines that intersect with the plural bit lines, and plural memory cells that each include a p-channel memory transistor. The semiconductor storage device includes plural p-channel charging transistors that are respectively connected to the plural bit lines, and a charging line that is connected to each of the plurality of charging transistors. A controller that ON/OFF controls the charging transistors places each of the charging transistors in an ON state prior to read current flowing in a read target bit line, and that places the charging transistor connected to the read target bit line in an OFF state when read current flows in the read target bit line.


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