The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2017

Filed:

Mar. 03, 2016
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Hiroshi Maejima, Setagaya Tokyo, JP;

Yuya Suzuki, Iwaki Fukushima, JP;

Hidehiro Shiga, Yokohama Kanagawa, JP;

Tomonori Kurosawa, Zama Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 8/10 (2006.01); G11C 8/12 (2006.01); G11C 16/08 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 8/10 (2013.01); G11C 8/12 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01);
Abstract

A semiconductor memory device includes a first block including a first memory string that includes a first memory cell and a first select transistor, a second block including a second memory string that includes a second memory cell and a second select transistor, a source line that is connected to the first memory string and the second memory string, and a controller that applies a source line voltage to the source line and a first voltage to a gate of the second select transistor during a program operation in which data is written to the first memory cell, the first voltage being greater than ground voltage and less than or equal to the source line voltage.


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