The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2017

Filed:

Apr. 22, 2015
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Daniel J. Post, Campbell, CA (US);

Nir J. Wakrat, Los Altos, CA (US);

Assignee:

APPLE INC., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 13/16 (2006.01); G06F 12/14 (2006.01); G06F 21/71 (2013.01); G06F 21/79 (2013.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 3/061 (2013.01); G06F 3/068 (2013.01); G06F 3/0613 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 12/1408 (2013.01); G06F 13/1673 (2013.01); G06F 21/71 (2013.01); G06F 21/79 (2013.01); G06F 2212/1052 (2013.01); Y02B 60/1228 (2013.01);
Abstract

Systems and methods are disclosed for efficient buffering for a system having non-volatile memory ('NVM'). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.


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