Dual path source synchronous interface

Abstract

A dual path source synchronous interface is disclosed. In one embodiment, a source synchronous interface includes a transmitter coupled to serially receive data from a first functional circuit block, and a receiver coupled to provide data serially to a second functional circuit block. Data is conveyed to the transmitter on a single signal line, and similarly, from the receiver on another single signal line. The transmitter is coupled to the receiver by two signal lines. The serial data received by the transmitter may be separated into two streams of alternating bits, e.g., a first bit is transmitted on one signal line, the next bit is transmitted on the other signal line, and so forth. At the receiver, the alternating bit streams may be re-combined into a single bit stream for transfer to the second functional circuit.