The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Mar. 28, 2016
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Vikas Agrawal, San Jose, CA (US);

Feng Qiu, Fremont, CA (US);

John C. Hsu, Sunnyvale, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018514 (2013.01);
Abstract

An integrated circuit includes a low voltage differential signaling (LVDS) output circuit, a high-speed current steering logic (HCSL) output circuit, a bias control circuit, a programmable voltage reference circuit coupled to the bias control circuit, an output stage circuit coupled to the HCSL output circuit, a first plurality of switches to switchably couple the bias control circuit to the LVDS output circuit, a second plurality of switches to switchably couple the bias control circuit to the output stage circuit and to the HCSL output circuit and a logic control circuit coupled to the programmable voltage reference circuit, the first plurality of switches and the second plurality of switches. The logic control circuit is configured to activate either the LVDS output circuit or the HCSL output circuit.


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