The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

May. 05, 2014
Applicant:

Analog Devices, Inc., Norwood, MA (US);

Inventors:

Eric Nestler, Cambridge, MA (US);

Jeffrey Venuti, Bedford, MA (US);

Vladimir Zlatkovic, Belmont, MA (US);

Kartik Nanda, Cambridge, MA (US);

Assignee:

ANALOG DEVICES, INC., Norwood, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01B 1/10 (2006.01); H03H 15/02 (2006.01); G01R 27/26 (2006.01); G06G 7/19 (2006.01); G06F 17/14 (2006.01); G01D 5/24 (2006.01); G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
H03H 15/02 (2013.01); G01R 27/2605 (2013.01); G06F 17/14 (2013.01); G06G 7/19 (2013.01); G01D 5/24 (2013.01); G01R 31/028 (2013.01);
Abstract

An approach to time domain filtering uses a passive charge sharing approach to implement an infinite impulse response filter. Delayed samples of an input signal are stored as charges on capacitors of a first array of capacitors, and delayed samples of the output signal are stored as charges on capacitors of a second array of capacitors. Outputs are determined by passively coupling capacitors of the first and second arrays to one another, and determining the output according to a total charge on the coupled capacitors. In some examples, a gain is applied to the total charge prior to storing the output on the second array of capacitors. In some examples, a charge scaling circuit is applied to the charges stored on the arrays prior to coupling capacitors to form the output.


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