The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Jun. 04, 2015
Applicant:

Dialog Semiconductor (Uk) Limited, Reading, GB;

Inventors:

Kemal Ozanoglu, Istanbul, TR;

Selcuk Talay, Istanbul, TR;

Pier Cavallini, Swindon, GB;

Naoyuki Unno, Kawasaki, JP;

Louis deMarco, Swindon, GB;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/1582 (2013.01); H02M 2001/0009 (2013.01); H02M 2001/0025 (2013.01);
Abstract

A switching DC-to-DC converter has an adaptive duty cycle limiting circuit with an inductor current sensor to generate a sense signal indicative of magnitude of the inductor current. A replica signal is generated from the sense signal and transferred through a replica parasitic resistance circuit. A differential voltage is developed across the replica parasitic resistances and compared with a maximum limit voltage level. The maximum limit voltage level is indicates that a gain level of the switching DC-to-DC converter has decreased even though the duty cycle has increased. A duty cycle limit signal is generated and transferred to disable a switch in a switching circuit for limiting the duty cycle of the switching DC-to-DC converter, when the gain level has decreased such that the switching DC-to-DC converter does not enter a region where the gain of the switching DC-to-DC converter has a negative slope.


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