The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2017
Filed:
Jul. 01, 2014
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Stanley Seungchul Song, San Diego, CA (US);
Mohamed Hassan Abu-Rahma, Mountain View, CA (US);
Beom-Mo Han, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 29/78 (2006.01); H01L 27/108 (2006.01); H01L 29/66 (2006.01); G11C 11/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/785 (2013.01); G11C 11/40 (2013.01); H01L 27/108 (2013.01); H01L 27/10802 (2013.01); H01L 29/66795 (2013.01); H01L 29/7831 (2013.01); H01L 29/7841 (2013.01); H01L 29/7855 (2013.01); H01L 29/78648 (2013.01); H01L 27/10826 (2013.01); H01L 27/10879 (2013.01);
Abstract
A transistor is disclosed and includes forming a gate of a transistor within a substrate having a surface and a buried oxide (BOX) layer within the substrate and adjacent to the gate at a first BOX layer face. The method also includes a raised source-drain channel ('fin'), where at least a portion of the fin extends from the surface of the substrate, and where the fin has a first fin face adjacent to a second BOX layer face of the BOX layer.