The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2017
Filed:
May. 30, 2011
Jong Mun Park, Graz, AT;
Georg Rohrer, Lebring, AT;
Jong Mun Park, Graz, AT;
Georg Rohrer, Lebring, AT;
AMS AG, Unterpremstatten, AT;
Abstract
The symmetric LDMOS transistor comprises a semiconductor substrate (), a well () of a first type of conductivity in the substrate, and wells () of an opposite second type of conductivity. The wells () of the second type of conductivity are arranged at a distance from one another. Source/drain regions () are arranged in the wells of the second type of conductivity. A gate dielectric () is arranged on the substrate, and a gate electrode () on the gate dielectric. A doped region () of the second type of conductivity is arranged between the wells of the second type of conductivity at a distance from the wells. The gate electrode has a gap () above the doped region (), and the gate electrode overlaps regions that are located between the wells () of the second type of conductivity and the doped region ().