The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2017
Filed:
May. 31, 2016
Applicants:
Joon Sung Lim, Yongin-si, KR;
Kyu Baik Chang, Seoul, KR;
Sung Hoi Hur, Seoul, KR;
Woo Jung Kim, Seongnam-si, KR;
Inventors:
Joon Sung Lim, Yongin-si, KR;
Kyu Baik Chang, Seoul, KR;
Sung Hoi Hur, Seoul, KR;
Woo Jung Kim, Seongnam-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/764 (2006.01); H01L 27/115 (2017.01); H01L 27/11575 (2017.01); H01L 27/1157 (2017.01); H01L 27/11573 (2017.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11575 (2013.01); H01L 27/1157 (2013.01); H01L 27/11573 (2013.01); H01L 21/823481 (2013.01); H01L 21/823878 (2013.01);
Abstract
A semiconductor device includes a substrate, a plurality of memory cell arrays, and an air gap structure. The substrate includes a cell region, a peripheral circuit region, and a boundary region. The boundary region is between the cell region and the peripheral circuit region. The plurality of memory cell arrays are on the cell region. The air gap structure includes a trench formed in the boundary region of the substrate. The air gap structure defines an air gap.