The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Nov. 28, 2015
Applicants:

Infineon Technologies Ag, Neubiberg, DE;

Robert Bosch Gmbh, Stuttgart-Feuerbach, DE;

Inventors:

Dietrich Bonart, Bad Abbach, DE;

Alfred Goerlach, Kusterdingen, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/24 (2006.01); H01L 23/58 (2006.01); H01L 23/051 (2006.01); H01L 21/66 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/585 (2013.01); H01L 22/34 (2013.01); H01L 23/051 (2013.01); H01L 23/24 (2013.01); H01L 24/29 (2013.01); H01L 23/5228 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/83 (2013.01); H01L 2224/291 (2013.01); H01L 2224/29017 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/83101 (2013.01); H01L 2224/83424 (2013.01); H01L 2224/83447 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1205 (2013.01); H01L 2924/1304 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01);
Abstract

Various embodiments provide a semiconductor device, wherein the semiconductor device comprises a semiconductor device chip formed at a substrate, wherein the semiconductor device chip comprises an active region formed in a center of the substrate and a boundary region free of active components of the semiconductor device chip; and a detection wiring arranged in the boundary region of the substrate and at least partially surrounding the active region, wherein the detection wiring and the semiconductor device chip are electrically isolated from each other; and wherein the detection wiring and the substrate are electrically connected with each other via a connection having a high electrical resistance.


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