Semiconductor memory device and method for transferring weak cell information

Abstract

A semiconductor memory device includes: a weak cell controller for programming weak cell information, outputting the weak cell information in response to an initialization signal or a write end signal, and outputting a read end signal whenever the weak cell information is outputted; a memory cell array region that includes memory cells for storing data in response to a row active signal and a column selection signal, and includes a first cell region for storing the weak cell information; an information transfer control circuit for generating a column address based on a column counting signal generated by using the read end signal, and generating a row address whenever the column counting signal reaches a predetermined value in response to the initialization signal; a row circuit for enabling the row active signal; and a column circuit for outputting the column selection signal by decoding the column address.