The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Sep. 22, 2015
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Derek Robert Hower, Durham, NC (US);

Harold Wade Cain, III, Raleigh, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 11/34 (2006.01); G06F 12/084 (2016.01); G06F 12/0846 (2016.01); G06F 12/0864 (2016.01); G06F 12/0895 (2016.01);
U.S. Cl.
CPC ...
G06F 12/084 (2013.01); G06F 11/3466 (2013.01); G06F 11/3471 (2013.01); G06F 12/0846 (2013.01); G06F 12/0848 (2013.01); G06F 11/348 (2013.01); G06F 12/0864 (2013.01); G06F 12/0895 (2013.01); G06F 2201/88 (2013.01); G06F 2201/885 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/2112 (2013.01); G06F 2212/282 (2013.01); G06F 2212/314 (2013.01); Y02B 60/1225 (2013.01);
Abstract

Generating approximate usage measurements for shared cache memory systems is disclosed. In one aspect, a cache memory system is provided. The cache memory system comprises a shared cache memory system. A subset of the shared cache memory system comprises a Quality of Service identifier (QoSID) tracking tag configured to store a QoSID tracking indicator for a QoS class. The shared cache memory system further comprises a cache controller configured to receive a memory access request comprising a QoSID, and is configured to access a cache line corresponding to the memory access request. The cache controller is also configured to determine whether the QoSID of the memory access request corresponds to a cache line assigned to the QoSID. If so, the cache controller is additionally configured to update the QoSID tracking tag.


Find Patent Forward Citations

Loading…