The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2017

Filed:

Jan. 30, 2015
Applicant:

Avago Technologies General Ip (Singapore) Pte. Ltd., Singapore, SG;

Inventors:

Hyun Mo Ku, Seoul, KR;

Jin Jeong, Kyunggi province, KR;

Deog Soon Choi, Seoul, KR;

Chris Chung, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 7/20 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01); H01L 23/373 (2006.01); H01L 23/13 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0206 (2013.01); H01L 23/3677 (2013.01); H01L 23/49827 (2013.01); H05K 1/112 (2013.01); H05K 1/115 (2013.01); H05K 1/183 (2013.01); H01L 23/13 (2013.01); H01L 23/3736 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H05K 2201/09563 (2013.01); H05K 2201/09827 (2013.01);
Abstract

A PCB includes a copper seed layer, a dielectric layer provided on the copper seed layer, a first thermal via and a plurality of second thermal vias disposed around the first thermal via. The first thermal via has a first through-hole in the dielectric layer and a first copper portion filled in the first through-hole, and each of the second thermal vias has a second through-hole in the dielectric layer and a second copper portion filled in the second through-hole. A mounting portion configured to mount a semiconductor device thereon is provided on the first copper portion.


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