The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2017

Filed:

Apr. 20, 2015
Applicant:

Synaptics Japan Gk, Tokyo, JP;

Inventor:

Yutaka Saeki, Tokyo, JP;

Assignee:

Synaptics Japan GK, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45179 (2013.01); G09G 3/3688 (2013.01); H03F 3/45475 (2013.01); G09G 2310/0291 (2013.01); H03F 2200/129 (2013.01); H03F 2203/45022 (2013.01); H03F 2203/45032 (2013.01);
Abstract

A differential amplifier circuit and display drive circuit having the same are disclosed herein. In one example, a differential amplifier circuit includes a differential pair transistor configure to receive a differential input signal. A current source is connected in series to the differential pair transistor and an output transistor that drives an output terminal on the basis of the differential input signal. The output transistor is configured to increase a current value of a current source on the basis of a timing at which a voltage level of the output terminal is caused to transition. The output transistor is configured to drive the output terminal only during a period in which the output terminal is caused to transition, and thus a slew rate is improved by increasing a bias current of the differential pair transistor in the period.


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