The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2017

Filed:

Mar. 10, 2016
Applicant:

Infineon Technologies Dresden Gmbh, Dresden, DE;

Inventors:

Claus Dahl, Dresden, DE;

Dmitri Alex Tschumakow, Dresden, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/732 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/40 (2006.01); H01L 21/265 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/732 (2013.01); H01L 29/0649 (2013.01); H01L 29/0804 (2013.01); H01L 29/0821 (2013.01); H01L 29/1004 (2013.01); H01L 29/401 (2013.01); H01L 29/42304 (2013.01); H01L 29/45 (2013.01); H01L 29/66272 (2013.01); H01L 21/26506 (2013.01); H01L 29/165 (2013.01);
Abstract

A method comprises arranging a stack, on a semiconductor substrate, comprising a sacrificial layer and an insulating layer. The insulator layer is at least partially arranged between the semiconductor substrate and the sacrificial layer. A recess is formed within the stack. The recess extends through the stack to the semiconductor substrate so that the recess at least partially overlaps with a surface of the collector region of the semiconductor substrate. The collector region extends from a main surface of the semiconductor substrate into the substrate material. The method further comprises generating a base structure at the collector region and in the recess. The base structure contacts and covers the collector region within the recess of the sacrificial layer. The method further comprises generating an emitter structure at the base structure. The emitter structure contacts and at least partially covers the base structure within the recess of the sacrificial layer.


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