The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2017

Filed:

Jun. 27, 2015
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, JP;

Inventor:

Yoshinao Miura, Kawasaki, JP;

Assignee:

RENESAS ELECTRONICS CORPORATION, Kawasaki-Shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/105 (2006.01); H01L 27/06 (2006.01); H01L 27/02 (2006.01); H01L 23/528 (2006.01); H01L 23/482 (2006.01); H01L 21/8252 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 23/4824 (2013.01); H01L 23/528 (2013.01); H01L 27/0207 (2013.01); H01L 27/0605 (2013.01); H01L 21/8252 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Reduction of the speed of switching between the drain electrodes of transistors and the cathode electrodes of diodes due to the inductances of lines coupling them is inhibited. Transistors and diodes are formed over a substrate. The transistors and the diodes are arranged in a first direction. The substrate also includes a first line, first branch lines, and second branch lines formed thereover. The first line extends between the transistors and the diodes. The first branch lines are formed to branch from the first line in a direction to overlap the transistors and are coupled to the transistors. The second branch lines are formed to branch from the first line in a direction to overlap the diodes and are coupled to the diodes.


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