The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9691479 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 27, 2017

Filed:

Apr. 29, 2016
Applicant:

Hewlett Packard Enterprise Development Lp, Houston, TX (US);

Inventors:

Emmanuelle J. Merced Grafals, Palo Alto, CA (US);

Brent Buchanan, Palo Alto, CA (US);

Le Zheng, Palo Alto, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 13/004 (2013.01); G11C 13/0026 (2013.01); G11C 13/0097 (2013.01); G11C 13/0002 (2013.01); G11C 2213/71 (2013.01);
Abstract

A method of operating a plurality of memristive cells coupled as a memristor array includes initializing a first select line, and, in parallel for a number of memristor cells in the first select line, determining whether a level of conductance of the memristor cells in the first select line are within a tolerance of a reference conductance, and, in response to a determination that the level of conductance is not within the tolerance of the reference conductance, adjusting the level of conductance for the memristor cells in the first select line.


Find Patent Forward Citations

Merced Grafals, Emmanuelle. (2017). Method of operating and apparatus of memristor arrays with diagonal lines interconnect between memristor cells (U.S. Patent No. 9691479). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9691479

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