The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2017

Filed:

Apr. 05, 2013
Applicant:

General Electric Company, Schnectady, NY (US);

Inventors:

Naresh Kesavan Rao, Niskayuna, NY (US);

James Wilson Rose, Niskayuna, NY (US);

Christopher David Unger, Milwaukee, WI (US);

Abdelaziz Ikhlef, Waukesha, WI (US);

Jonathan David Short, Niskayuna, NY (US);

Assignee:

General Electric Company, Niskayuna, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A61B 6/00 (2006.01); G01T 1/24 (2006.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
G01T 1/247 (2013.01); A61B 6/42 (2013.01); H01L 27/14661 (2013.01); H01L 27/14663 (2013.01); A61B 6/4233 (2013.01);
Abstract

Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced. The co-location of the electronics next to or proximal to the photodetector array also enables/facilitates programmable pixel configuration for optimal image quality.


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