The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Jun. 30, 2015
Applicant:

Alpha and Omega Semiconductor (Cayman) Ltd., Sunnyvale, CA (US);

Inventors:

Yu-Ming Chen, Hsinchu, TW;

Jung-Pei Cheng, Zhubei, TW;

Pei-Lun Huang, Zhubei, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); H02M 3/335 (2006.01); H02M 1/32 (2007.01); H02M 1/00 (2006.01); G01R 31/40 (2014.01); G01R 19/165 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33507 (2013.01); H02M 1/32 (2013.01); G01R 19/16538 (2013.01); G01R 31/40 (2013.01); H02M 2001/0009 (2013.01);
Abstract

A circuit and a method for evaluating a load condition in a flyback converter are disclosed. A first current source is used for providing a preset current Iequal to a sum of the off current value Iand the blanking current value Ito charge a first capacitor, and a second current source is used for providing a reference current Ito charge a second capacitor. A comparator receives a voltage applied on the first capacitor at its positive input end and a voltage applied on the second capacitor at its negative input end. The output current transmitted to the load by the flyback converter is varied to the change of the preset current I, as such the load condition is detected by the comparison result generated by the comparator.


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