The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Apr. 12, 2016
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Sankuei Lin, Cupertino, CA (US);

Ajay Bhatnagar, Saratoga, CA (US);

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 27/00 (2006.01); H01L 29/00 (2006.01); H01L 21/768 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 29/161 (2006.01); H01L 29/16 (2006.01); H01L 29/165 (2006.01); H01L 29/24 (2006.01); H01L 29/267 (2006.01); H01L 29/78 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/76805 (2013.01); H01L 21/76829 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823871 (2013.01); H01L 21/823878 (2013.01); H01L 23/535 (2013.01); H01L 27/0924 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/1608 (2013.01); H01L 29/24 (2013.01); H01L 29/267 (2013.01); H01L 29/7848 (2013.01); H01L 2029/7858 (2013.01);
Abstract

Embodiments described herein generally relate to forming a semiconductor structure. In one embodiment, a method of forming a semiconductor structure is formed herein. The method includes exposing an oxide layer of the semiconductor structure, depositing a polysilicon layer on the semiconductor structure, filling a first gap formed by exposing the oxide layer, depositing a hard mask on the polysilicon layer, selectively removing the hard mask and the polysilicon layer, depositing an oxide layer on the semiconductor structure, filling a second gap formed by selectively removing the hard mask and polysilicon layer, exposing the polysilicon layer deposited on the semiconductor structure, selectively removing the polysilicon layer from the first gap, and selectively removing an etch stop layer from a surface of a contact in the semiconductor structure.


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