The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Feb. 29, 2016
Applicant:

General Electric Company, Schenectady, NY (US);

Inventors:

Mitalkumar Gulabrai Kanabar, Toronto, CA;

Oscar Lopez Aguirre, Vizcaya, ES;

Rodrigo Gutierrez Argandona, Vizcaya, ES;

Jason Antonio Rodrigues, Toronto, CA;

Mark Gerard Adamiak, Wayne, PA (US);

Assignee:

General Electric Company, Schenectady, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/30 (2006.01); H04Q 9/00 (2006.01); G01R 19/25 (2006.01); G01R 21/00 (2006.01); G01R 23/02 (2006.01);
U.S. Cl.
CPC ...
G06F 17/30569 (2013.01); G01R 19/2513 (2013.01); G01R 21/00 (2013.01); G01R 23/02 (2013.01); G06F 17/30321 (2013.01); H04Q 9/00 (2013.01); Y02E 60/728 (2013.01); Y04S 10/265 (2013.01);
Abstract

A system includes a Synchrophasor Data Management System (SDMS), in which the SDMS includes a Synchrophasor Processor System (SPS). The SPS includes a Phasor Data Concentrator (PDC) configured to receive a first plurality of inputs from a first Phasor Measurement Unit (PMU), transform at least one of the first plurality of inputs into a first time aligned output by time aligning the at least one of the first plurality of inputs. The SPS further includes a virtual PMU configured to aggregate the first time aligned output into a PMU dataset, in which the SPS is configured to transmit the PMU dataset to a second PMU, an external PDC, a super PDC, or a combination thereof.


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