The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Nov. 26, 2014
Applicant:

The United States of America As Represented BY the Secretary of the Navy, Washington, DC (US);

Inventors:

Adam Duncan, Bloomington, IN (US);

Matthew Gadlage, Bloomington, IN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/11 (2006.01); G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
G01R 31/024 (2013.01); G01R 31/11 (2013.01);
Abstract

A method and system for determining short, open, and good connections using digital input and output (IO) structures in a device under test (DUT) continuity test, through the combined methods of using resistance-capacitance (RC) delay, time domain reflectometry (TDR), and forcing voltage on to a single IO pin of the DUT while measuring voltage on remaining IO pins of said DUT. In one embodiment, the combined methods are executed without the DUT in a test socket to produce a first set of test values and also with the DUT in a test socket to produce a second set of test values. The first and second sets of test values are compared to determine if one or more circuits of the DUT have a short circuit, an open circuit, or are a good (have an electrical connection that is not a short circuit or an open circuit) circuit.


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