The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2017
Filed:
Mar. 17, 2016
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Anil Kumar Kandala, Hyderabad, IN;
Srinivasa L. Karumajji, Hyderabad, IN;
Santosh Yachareni, Hyderabad, IN;
Sandeep Vundavalli, Secunderabad, IN;
Udaya Kumar Bobbili, Karim Nagar, IN;
Golla V S R K Prasad, Guntur, IN;
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01); H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
H03K 19/1737 (2013.01); H03K 19/1776 (2013.01);
Abstract
An interconnect element includes: a selection circuit for receiving input signals and having a selection output; a half-latch circuit having an input coupled to the selection output, wherein the half latch circuit comprises a pull-up device; and a common bias circuit coupled to the pull-up device, wherein the common bias circuit is configured to supply a tunable bias voltage to the pull-up device.