The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

Oct. 07, 2016
Applicant:

Solar Junction Corporation, San Jose, CA (US);

Inventors:

Sathya Chary, San Francisco, CA (US);

Ewelina Lucow, Los Galos, CA (US);

Sabeur Siala, Sunnyvale, CA (US);

Ferran Suarez, San Jose, CA (US);

Ali Torabi, Los Gatos, CA (US);

Lan Zhang, Palo Alto, CA (US);

Assignee:

Solar Junction Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0224 (2006.01); H01L 31/18 (2006.01); H01L 31/02 (2006.01); H01L 31/0725 (2012.01); H01L 31/0216 (2014.01);
U.S. Cl.
CPC ...
H01L 31/02008 (2013.01); H01L 31/02168 (2013.01); H01L 31/022441 (2013.01); H01L 31/0725 (2013.01); H01L 31/186 (2013.01);
Abstract

Photovoltaic cells, methods for fabricating surface mount multijunction photovoltaic cells, methods for assembling solar panels, and solar panels comprising photovoltaic cells are disclosed. The surface mount multijunction photovoltaic cells include through-wafer-vias for interconnecting the front surface epitaxial layer to a contact pad on the back surface. The through-wafer-vias are formed using a wet etch process that removes semiconductor materials non-selectively without major differences in etch rates between heteroepitaxial III-V semiconductor layers.


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