The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

Apr. 15, 2016
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Makoto Ueki, Tokyo, JP;

Koji Masuzaki, Tokyo, JP;

Masaharu Matsudaira, Tokyo, JP;

Takashi Hase, Tokyo, JP;

Yoshihiro Hayashi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 13/0064 (2013.01); G11C 13/004 (2013.01); G11C 2013/0066 (2013.01); G11C 2013/0073 (2013.01); G11C 2013/0092 (2013.01); G11C 2213/79 (2013.01); G11C 2213/82 (2013.01);
Abstract

Included are memory cells each including a resistance change element and a control circuit. The circuit performs an On writing process for applying, to the memory cell, an On writing pulse for the cell to be in a resistance state where a resistance value of the resistance change element is lower than a first reference value and an Off writing process for applying an Off writing pulse with an opposite polarity to the On writing pulse for a high resistance state with a second reference value or greater. The circuit applies, in the On writing process, a trial pulse having the same polarity as that of the On writing pulse and having the pulse width shorter than that of the On writing pulse and a reset pulse having the same polarity as that of the On writing pulse, in this order before applying the On writing pulse to the cell.


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