The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

Aug. 24, 2016
Applicant:

Dialog Semiconductor B.v., s-Hertogenbosch, NL;

Inventors:

Rahul Todi, Eindhoven, NL;

Mark Stefan Oude Alink, Delden, NL;

Assignee:

Dialog Semiconductor B.V., 's-Hertogenbosch, NL;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 7/22 (2013.01); G11C 5/02 (2013.01); G11C 5/06 (2013.01); G11C 7/1072 (2013.01); G11C 7/222 (2013.01);
Abstract

An electronic circuit is disclosed for dividing the frequency of a periodic signal, wherein at least one of the memory elements is arranged with its output terminal connected to the input terminal of another memory element wherein the electronic circuit is configured to generate an output signal having a smaller fundamental frequency than the clock signal at at least one of the output terminals. Each memory element is configured to change and hold a voltage at the output terminal based on a voltage at the input terminal at times controlled by a clock signal received at the clock terminal. At least two of the memory elements are stacked in the sense that the bottom terminal of a first memory element is connected to the top terminal of a second memory element to enable the charge to flow from the first memory element to the second memory element.


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