The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

Mar. 05, 2014
Applicant:

Osram Opto Semiconductors Gmbh, Regensburg, DE;

Inventors:

Martin Haushalter, Regensburg, DE;

David O'Brien, Bad Abbach, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/62 (2010.01); H01L 33/48 (2010.01); H05K 1/18 (2006.01); H05K 3/34 (2006.01); F21K 9/20 (2016.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
H01L 33/62 (2013.01); F21K 9/20 (2016.08); H01L 33/486 (2013.01); H05K 1/182 (2013.01); H05K 3/3442 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H05K 1/141 (2013.01); H05K 1/142 (2013.01); H05K 2201/049 (2013.01); H05K 2201/09072 (2013.01); H05K 2201/09954 (2013.01); H05K 2201/10106 (2013.01); Y02P 70/613 (2015.11);
Abstract

An electronic device includes a printed circuit board having a cutout, wherein an optoelectronic component including a housing having an outer surface, the housing has a chip receptacle space at a top side, an optoelectronic semiconductor chip is arranged in the chip receptacle space, the housing has a first soldering contact surface and a second soldering contact surface, the first soldering contact surface and the second soldering contact surface face in the same spatial direction as the outer surface, and the first soldering contact surface and the second soldering contact surface are set back relative to the outer surface, is arranged in the cutout.


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