The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

Mar. 15, 2016
Applicant:

Su Zhou Oriental Semiconductor Co., Ltd., Jiangsu, CN;

Inventors:

Zhendong Mao, Jiangsu, CN;

Lei Liu, Jiangsu, CN;

Wei Liu, Jiangsu, CN;

Minzhi Lin, Jiangsu, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 21/265 (2006.01); H01L 21/311 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66666 (2013.01); H01L 21/26513 (2013.01); H01L 21/28 (2013.01); H01L 21/31105 (2013.01); H01L 21/31144 (2013.01); H01L 23/562 (2013.01); H01L 29/423 (2013.01); H01L 29/4236 (2013.01); H01L 29/78 (2013.01);
Abstract

The present invention relates to the field of manufacturing technologies of semiconductor power devices, and more particularly to a method for manufacturing a split-gate power device. In the method for manufacturing a split-gate power device according to the present invention, lateral etching is added to form lateral recesses of a control gate groove below a first insulating film in a process of forming the control gate groove by etching, and therefore, after a first conductive film is deposited, the first conductive film can be directly etched by using the first insulating film as a mask to form control gates. The technical process of the present invention is simplified, reliable and easy to control, and can greatly improve the yield of the split-gate power device. The present invention is particularly suitable for the manufacture of 25V-200V semiconductor power devices.


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