The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

Jul. 12, 2016
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Kazuyuki Sakata, Tokyo, JP;

Takafumi Betsui, Tokyo, JP;

Assignee:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 24/09 (2013.01); H01L 24/11 (2013.01); H01L 24/17 (2013.01); H01L 24/27 (2013.01); H01L 24/29 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2924/1205 (2013.01);
Abstract

A semiconductor device with enhanced reliability. The semiconductor device has a wiring substrate which includes a first terminal electrically connected with a power supply potential supply section of a semiconductor chip, a first wiring coupling the power supply potential supply section with the first terminal, a second terminal electrically connected with a reference potential supply section of the semiconductor chip, and a second wiring coupling the reference potential supply section with the second terminal. The first terminal and second terminal are arranged closer to the periphery of the wiring substrate than the semiconductor chip. The second wiring is extended along the first wiring.


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