The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

Nov. 26, 2014
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Jim Walls, Mesa, AZ (US);

Santosh Murali, Tempe, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 7/04 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 7/04 (2013.01); G11C 13/0007 (2013.01); G11C 13/0011 (2013.01); G11C 13/0097 (2013.01); G11C 13/0035 (2013.01); G11C 2013/0083 (2013.01);
Abstract

A method of controlling a resistive memory cell is provided. A resistance threshold value is defined for the memory cell, wherein a circuit identifies the cell as erased if a detected resistance of the cell is above the resistance threshold and identifies the cell as programmed if the detected resistance is below the resistance threshold value. A filament is formed across an electrolyte switching region of the cell by applying an electrical charge, wherein the cell having the formed filament has a first resistance. The cell is then erased to an erased state having a second resistance greater than the first resistance. The cell is then programmed to a quasi-erased state having a third resistance between the first and second resistances, and above the resistance threshold value such that the cell is identified by the circuit as erased. The cell may then be maintained in the quasi-erased state.


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