The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

Jan. 06, 2016
Applicant:

Texas Instruments Deutschland Gmbh, Freising, DE;

Inventors:

Stefan A. Reithmaier, Vilsheim, DE;

Josy Bernard, Freising, DE;

Carsten I. Stoerk, Freising, DE;

Nicolas M Guibourg, Munich, DE;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3655 (2013.01); G09G 3/3659 (2013.01); G09G 3/3674 (2013.01); G09G 3/3685 (2013.01); G09G 2310/0289 (2013.01); G09G 2330/023 (2013.01);
Abstract

A level shifter circuit has a plurality of channels for providing signals to a capacitive load and has circuits for sharing charge stored in the capacitive load between the channels. A first pair of channel clock generating circuits are coupled respectively to a first pair of channels. A second pair of channel clock generating circuits are coupled respectively to a second pair of channels. A pair of switches couple the first pair of channels together and the second pair of channels together, respectively, for sharing charge between the channels. A single resistor is coupled in circuit with all of the channels for controlling a slope of charge sharing between channels.


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