The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Aug. 31, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventor:

Joshua Lance Puckett, Cary, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/003 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 19/003 (2013.01); H03K 19/018507 (2013.01);
Abstract

Inversely proportional voltage-delay buffers for buffering data according to data voltage levels are disclosed. In one aspect, an inversely proportional voltage-delay buffer is configured to buffer a data signal for an amount of time that is inversely proportional to a voltage level of the data signal. The inversely proportional voltage-delay buffer includes an inversion circuit and pass circuit. The inversion circuit is configured to generate a control signal that is the logic inverse of the data signal. Notably, the control signal transitions at a rate proportional to the voltage level of the data signal. The pass circuit is configured to generate a weak logic state of the data signal when the data signal and the control signal have the same logic state. The pass circuit is configured to generate a strong logic state of the data signal when the data input and the control signal have opposite logic states.


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