The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

May. 12, 2015
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Gabriel C. Aungurencei, San Jose, CA (US);

Vladimir Vitchev, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 7/155 (2006.01); H02M 7/217 (2006.01); H02M 7/219 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 7/217 (2013.01); H02M 7/219 (2013.01); H02M 2001/0009 (2013.01); H02M 2007/2195 (2013.01);
Abstract

A system and method of synchronous rectification includes a synchronous rectifier circuit. The synchronous rectifier circuit includes a direct current (DC) load coupled between a DC output node and a ground node, an alternating current (AC) source applying an AC waveform to an AC input node, an upper switch coupled between the DC output node and the AC input node, and a lower switch coupled between the AC input node and the ground node. In a first state, the upper switch is turned on and the lower switch is turned off. In a second state, the upper switch is turned off and the lower switch is turned on. In a third state, the lower switch is operated in an enhanced detection mode. The synchronous rectifier circuit transitions from the second state to the third state when the voltage of the AC input node increases above a threshold voltage.


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