The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2017
Filed:
Nov. 06, 2015
Applicant:
Infineon Technologies Austria Ag, Villach, AT;
Inventors:
Romain Esteve, Treffen am Ossiacher See, AT;
Cédric Ouvrard, Villach, AT;
Assignee:
Infineon Technologes Austria AG, Villach, AT;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/808 (2006.01); H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 21/02 (2006.01); H01L 21/04 (2006.01); H01L 29/16 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66909 (2013.01); H01L 21/02378 (2013.01); H01L 21/0465 (2013.01); H01L 29/0843 (2013.01); H01L 29/1066 (2013.01); H01L 29/41766 (2013.01); H01L 29/8083 (2013.01); H01L 29/1608 (2013.01); H01L 29/2003 (2013.01);
Abstract
A method of manufacturing a vertical junction field effect transistor (JFET) includes forming a drain in a semiconductor substrate, forming a compound semiconductor epitaxial layer on the semiconductor substrate, and forming a source, a gate, a drift region, and a body diode all in the same compound semiconductor epitaxial layer. The drain is vertically spaced apart from the source and the gate by the drift region. The body diode is connected between the drain and the source.