The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Sep. 18, 2015
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Osamu Tsuboi, Kawasaki, JP;

Ikuo Soga, Isehara, JP;

Tamotsu Yamamoto, Tachikawa, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01M 10/42 (2006.01); H01L 29/786 (2006.01); H01L 27/28 (2006.01); H01L 25/16 (2006.01); H01L 35/32 (2006.01); H01L 27/12 (2006.01); H01L 23/00 (2006.01); H01M 2/10 (2006.01); H01L 51/05 (2006.01); H01M 10/052 (2010.01); H01M 10/0562 (2010.01); H01L 29/66 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/58 (2013.01); H01L 24/18 (2013.01); H01L 25/16 (2013.01); H01L 27/1225 (2013.01); H01L 27/1259 (2013.01); H01L 27/283 (2013.01); H01L 29/7869 (2013.01); H01L 29/78603 (2013.01); H01L 35/32 (2013.01); H01L 51/0545 (2013.01); H01M 2/1066 (2013.01); H01M 10/4257 (2013.01); H01L 21/568 (2013.01); H01L 29/66969 (2013.01); H01L 2924/12032 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/15788 (2013.01); H01M 10/052 (2013.01); H01M 10/0562 (2013.01); H01M 2010/4271 (2013.01); H01M 2220/10 (2013.01); H01M 2220/30 (2013.01);
Abstract

An electronic device includes: a substrate; a first all-solid-state secondary cell provided on the substrate, the first all-solid-state secondary cell including a first electrode layer, a solid electrolyte layer, and a second electrode layer; a first transistor including a first source drain, a second source drain electrically connected to the second electrode layer, and a first gate electrode; a first terminal electrically connected to the first electrode layer; a second terminal to control a potential of the first gate electrode; a third terminal electrically connected to the first source drain; and a sealing layer covering the first all-solid-state secondary cell and the first transistor, wherein the first terminal, the second terminal, and the third terminal are exposed on an upper surface of the sealing layer.


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