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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9666300 B1

PDFFull Text
Date of Patent:
May. 30, 2017

Filed:

Oct. 24, 2016

Three-dimensional one-time-programmable memory comprising off-die address/data-translator

Applicant:

Xiamen Haicun Ip Technology Llc., XiaMen, CN;

Inventors:

Guobiao Zhang, Corvallis, OR (US);

HongYu Yu, ShenZhen, CN;

RangYu Deng, ChangSha, CN;

Chen Shen, Suzhou, CN;

Bin Yu, HangZhou, CN;

XiangDong Lu, HeFei, CN;

JinFeng Kang, Beijing, CN;

XuGuang Wang, SuZhou, CN;

DongYun Zhang, ShenZhen, CN;

ChenChang Zhan, ShenZhen, CN;

Assignees:

XiaMen HaiCun IP Technology LLC, XiaMen, FuJian, CN;

Other;

Attorney:
Primary Examiner:

Kyoung Lee

Assistant Examiner:

Ratisha Mehta

Int. Cl.
CPC ...
G11C 17/16 (2006.01); G11C 5/02 (2006.01); G11C 5/04 (2006.01); G11C 5/14 (2006.01); G11C 8/14 (2006.01); G11C 17/18 (2006.01); H01L 23/525 (2006.01); H01L 27/112 (2006.01); G11C 13/00 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/10 (2006.01); H01L 25/18 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G11C 17/16 (2013.01); G11C 5/02 (2013.01); G11C 5/04 (2013.01); G11C 5/145 (2013.01); G11C 8/14 (2013.01); G11C 17/18 (2013.01); H01L 23/5252 (2013.01); H01L 25/0657 (2013.01); H01L 27/11206 (2013.01); G11C 13/0002 (2013.01); G11C 2029/0411 (2013.01); G11C 2213/71 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0655 (2013.01); H01L 25/105 (2013.01); H01L 25/18 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1064 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/181 (2013.01);
Abstract

The present invention discloses a three-dimensional one-time-programmable memory (3D-OTP) comprising an off-die address/data-translator (A/D-translator). It comprises at least a 3D-array die and at least a peripheral-circuit die. At least an A/D-translator of the 3D-OTP arrays is located on the peripheral-circuit die instead of the 3D-array die. The A/D-translator converts at least an address and/or data between logic and physical spaces.

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